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Thursday, January 30, 2025
12:30 PM - 2:00 PM
T-4 Conference Room (TA03, Building 524, Room 105)

Seminar

Hardware-Efficient FTQC with Bosonic Grid States in Superconducting Circuits

Marc-Antoine Lemonde (CTO) and Dany Lachance-Quirion (VP)
Nord Quantique

Quantum computing holds the promise of solving classically intractable problems. Enabling this requires scalable and hardware-efficient quantum processors with vanishing error rates. In this talk I will discuss how bosonic codes, particularly grid state encodings, offer a pathway to scalable fault-tolerant quantum computing in superconducting circuits. By leveraging the large Hilbert space of bosonic modes, quantum error correction can operate at the single physical unit level, therefore reducing drastically the hardware requirements to bring fault-tolerant quantum computing to scale. Going beyond the well-known Gottesman-Kitaev-Preskill (GKP) code, I will discuss how using multiple bosonic modes to encode a single qubit offers increased protection against control errors and enhances its overall error-correcting capabilities. Going deeper into experimental validations, I will present in more details the designs and control operations we use to implement GKP qubits and multimode grid codes. I will finally briefly present the state and plans for the 2025 Nord Quantique prototypes.

Host: Carleton Coffrin (A-1)